Actas de congresos
Performance evaluation of Tunnel-FET basic amplifier circuits
Fecha
2019-03-14Registro en:
2019 IEEE 10th Latin American Symposium on Circuits and Systems, LASCAS 2019 - Proceedings, p. 21-24.
10.1109/LASCAS.2019.8667587
2-s2.0-85064163027
0496909595465696
0000-0002-0886-7798
Autor
Universidade de São Paulo (USP)
CI Brasil Program (CT-SP)
Universidade Estadual Paulista (Unesp)
Institución
Resumen
This work analyzes the performance of measured Tunneling Field-Effect Transistors (TFET) when applied to analog circuits. The method uses a look-up table based behavioral model, taking the experimental results from a fabricated silicon pTFET as input. The Verilog-A behavioral language is used to implement the TFET model, enabling the use with spice-like simulators along with passive and active elements, achieving bigger circuits than other implementations involving numerical multiphysics simulation of the device. The model is further incremented with device capacitances, and the response of analog circuits is considered. An Operational Transconductance Amplifier (OTA) is presented, showing near 130 dB open-loop gain and 18.9nW power consumption.