info:eu-repo/semantics/article
Hybrid sorting algorithm implemented by High Level Synthesis
Fecha
2020-03Registro en:
de Micco, Luciana; Acosta, M.; Antonelli, M.; Hybrid sorting algorithm implemented by High Level Synthesis; Institute of Electrical and Electronics Engineers; IEEE Latin America Transactions; 18; 2; 3-2020; 430-437
1548-0992
CONICET Digital
CONICET
Autor
de Micco, Luciana
Acosta, M.
Antonelli, M.
Resumen
This paper proposes a hybrid data ordering algorithm which executes serial and parallel instructions. The implementation of the system is presented in the Zedboard development board of Xilinx that includes a SoC (System on Chip). The design was done in high level language HLS (High Level Synthesis). It receives a vector of N elements and delivers the set of indexes of the L major elements ordered. The complexity of the algorithm is analyzed in a generic way. The required times and resources are evaluated and compared with well known sorting algorithms.