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Application-specific processor for piecewise linear functions computation
(Institute of Electrical and Electronics Engineers, 2011-05)
This paper presents an application specific processor architecture for the calculation of simplicial piecewise linear functions of up to six dimensions with 24-bit wide input words. The architecture, in particular registers ...
Surrogate-based Analysis and Design Optimization of Power Delivery Networks
(IEEE, 2020-03-24)
Surrogate-based Analysis and Design Optimization of Power Delivery Networks
(IEEE, 2020-03-24)
Dependability Evaluation of COTS Microprocessors via On-Chip debugging facilitiesEvaluación de la fiabilidad de microprocesadores COTS mediante las infraestructuras de depuración On-Chip
(Universidad Tecnológica de Panamá, Panamá, 2017)
E-waste upcycling for the synthesis of plasmonic responsive gold nanoparticles
(Pergamon-Elsevier Science Ltd, 2020-11)
One of the current challenges in circular economy is the ability to transform waste into valuable products. In this work, waste of electrical and electronic equipment (WEEE) was used as a gold source to prepare stable gold ...
Minimum toe clearance and tripping probability in people with unilateral transtibial amputation walking on ramps with different prosthetic designs
(Elsevier Ireland, 2020-09)
Background: Minimum Toe Clearance (MTC) is defined as the minimum vertical distance between the lowest point under the front part of the foot and the ground, during mid-swing. Low values of MTC and walking on inclines are ...
Post-silicon Validation Procedure for a PWL ASIC Microprocessor Architecture
(Institute of Electrical and Electronics Engineers, 2011)