The MULTIPLUS/MULPLIX project aims at the development of a modular distributed shared-memory parallel architecture able to support up to 1024 processing elements based on SP ARC microprocessors and at the implementation of MULPLIX, a Unix-like operating system which provides a suitable parallel programming environment for the MULTIPLUS architecture. The project includes research effort in five areas: parallel architectures, operating systems, CMOS lC design, parallel programming environments and parallel algorithms. This technical report firstly presents an overview of the MULTIPLUS architecture and describes in detail the cu"ent implementation of its four basic hardware modules: the Processing Element, the 1/0 Processor, the Multistage lnteconnection Network and the Network lnterface. Secondly, the MULPLIX operating system definition is reviewed and the parallel programming primitives available within MULPUX are presented Following, developments in the area of CMOS lC designs for use within the MULTIPLUS architecture are described The implementations of PVM and Pthreads parallel programming libraries within the MULPLIX system are also discussed. Finally the main results achieved with the parallelization of Simulated Annealing and Genetic algorithms are commented.