IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

dc.creatorPerez, Marcelo A.
dc.creatorCortes, Patricio
dc.creatorRodriguez, Jose
dc.date2016-12-05T15:35:50Z
dc.date2022-07-06T19:36:55Z
dc.date2016-12-05T15:35:50Z
dc.date2022-07-06T19:36:55Z
dc.date2008
dc.date.accessioned2023-08-21T21:40:18Z
dc.date.available2023-08-21T21:40:18Z
dc.identifier1080443
dc.identifier1080443
dc.identifier0278-0046
dc.identifierhttps://hdl.handle.net/10533/142229
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/8285746
dc.description70
dc.descriptionFONDECYT
dc.description12
dc.descriptionFONDECYT
dc.languageeng
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.relationinstname: Conicyt
dc.relationreponame: Repositorio Digital RI2.0
dc.relationinstname: Conicyt
dc.relationreponame: Repositorio Digital RI2.0
dc.relationinfo:eu-repo/grantAgreement/Fondecyt/1080443
dc.relationinfo:eu-repo/semantics/dataset/hdl.handle.net/10533/93477
dc.relationhttps://doi.org/10.1109/TIE.2008.2006948
dc.rightsinfo:eu-repo/semantics/openAccess
dc.titlePredictive control algorithm technique for multilevel asymmetric cascaded h-bridge inverters
dc.titleIEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
dc.typeArticulo
dc.typeinfo:eu-repo/semantics/article
dc.typeinfo:eu-repo/semantics/publishedVersion
dc.coveragePISCATAWAY


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