Eye Diagram Optimization based on Design of Experiments (DoE) to Accelerate Industrial Testing of High Speed Links

dc.creatorViveros-Wacher, Andrés
dc.creatorRayas-Sánchez, José E.
dc.date2019-08-29T18:44:29Z
dc.date2019-08-29T18:44:29Z
dc.date2016-12
dc.date.accessioned2023-07-21T22:09:17Z
dc.date.available2023-07-21T22:09:17Z
dc.identifierA. Viveros-Wacher and J. E. Rayas-Sánchez, "Eye diagram optimization based on design of experiments (DoE) to accelerate industrial testing of high speed links," 2016 IEEE MTT-S Latin America Microwave Conference (LAMC), Puerto Vallarta, 2016, pp. 1-3. doi: 10.1109/LAMC.2016.7851249
dc.identifierhttp://hdl.handle.net/11117/5993
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/7760604
dc.descriptionHigher data rates in high speed input/output (HSIO) links demand more equalization (EQ) complexity, leading to an ever larger number of possible combinations of EQ settings. Finding the optimal set of EQ parameters through exhaustive methods is prohibitive given the time-to-market requirements. This paper presents a methodology to design a statistically sufficient set of experiments for optimizing the receiver eye diagram of a HSIO link while greatly reducing the overall testing time. Our methodology is illustrated by a 5-Gbps HSIO link comprised of a Tx, a channel (including packages, vias, PCB traces, connectors and a crosstalk aggressor) and an Rx.
dc.formatapplication/pdf
dc.languageeng
dc.publisherIEEE
dc.rightshttp://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf
dc.subjectEesign of Experiments
dc.subjectEqualisers
dc.subjectResponse Surface Methodology
dc.subjectTelecommunication Links
dc.subjectHSIO Link
dc.subjectHigh-speed Links
dc.subjectEye Diagram Optimization
dc.titleEye Diagram Optimization based on Design of Experiments (DoE) to Accelerate Industrial Testing of High Speed Links
dc.typeinfo:eu-repo/semantics/conferencePaper


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