dc.creator | Duron-Rosales, Ismael | |
dc.creator | Rangel-Patiño, Francisco E. | |
dc.creator | Rayas-Sánchez, José E. | |
dc.creator | Chávez-Hurtado, José L. | |
dc.creator | Hakim, Nagib | |
dc.date | 2019-08-29T20:22:54Z | |
dc.date | 2019-08-29T20:22:54Z | |
dc.date | 2017-06 | |
dc.date.accessioned | 2023-07-21T21:59:42Z | |
dc.date.available | 2023-07-21T21:59:42Z | |
dc.identifier | . Duron-Rosales, F. E. Rangel-Patiño, J. E. Rayas-Sánchez, J. L. Chávez-Hurtado and N. Hakim, "Reconfigurable FIR filter coefficient optimization in post-silicon validation to improve eye diagram for optical interconnects," 2017 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS), Cozumel, 2017, pp. 85-88. doi: 10.1109/ICCDCS.2017.7959697 | |
dc.identifier | 2165-3550 | |
dc.identifier | http://hdl.handle.net/11117/5999 | |
dc.identifier.uri | https://repositorioslatinoamericanos.uchile.cl/handle/2250/7756987 | |
dc.description | Enhanced small form-factor pluggable (SFP+) is a specification for a new generation of optical modular transceivers. The devices are designed for use with small form factor (SFF) connectors, and offer high speed and physical compactness. SFP+ modules require high-quality ASIC/SerDes transmitters (Tx) because IEEE and fibre channel standards place strict requirements on the optical interface, and linear/limiting SFP+ module types have Tx paths that do not correct for timing jitter. This introduces a design challenge to guarantee performance over process, temperature, and voltage (PVT) conditions. Adjusting the Tx equalization across PVT and different interconnect channels can be a time-consuming task in post-silicon validation. In order to overcome this problem, this paper proposes a direct optimization method based on a suitable objective function formulation to efficiently tune the Tx equalizer and optimize the eye diagram to successfully comply with industrial specifications. | |
dc.format | application/pdf | |
dc.language | eng | |
dc.publisher | IEEE | |
dc.rights | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf | |
dc.subject | Equalization | |
dc.subject | Ethernet | |
dc.subject | Eye Diagram | |
dc.subject | FIR | |
dc.subject | HSIO | |
dc.subject | ISI | |
dc.subject | Optimization | |
dc.subject | Post-silicon Validation | |
dc.subject | Signal Integrity | |
dc.subject | SFP | |
dc.subject | Tuning | |
dc.subject | Transmitter | |
dc.title | Reconfigurable FIR Filter Coefficient Optimization in Post-Silicon Validation to Improve Eye Diagram for Optical Interconnects | |
dc.type | info:eu-repo/semantics/article | |