Artigo
Evaluating Soft-Core RISC-V processor in SRAM-based FPGA under radiation effects
Fecha
2020Registro en:
OLIVEIRA, ÁDRIA B. DE; TAMBARA, LUCAS A.; BENEVENUTI, FABIO; BENITES, LUIS A. C.; ADDED, NEMITALA; AGUIAR, VITOR A. P.; MEDINA, NILBERTO H.; GUAZZELLI, M. A.; KASTENSMIDT, FERNANDA L. Evaluating Soft-Core RISC-V processor in SRAM-based FPGA under radiation effects. IEEE TRANSACTIONS ON NUCLEAR SCIENCE, n. 1, p. 1-1, 2020.
0018-9499
Autor
OLIVEIRA, ÁDRIA B. DE
TAMBARA, LUCAS A.
BENEVENUTI, FABIO
BENITES, LUIS A. C.
ADDED, NEMITALA
AGUIAR, VITOR A. P.
MEDINA, NILBERTO H.
GUAZZELLI, Marcilei Aparecida
KASTENSMIDT, FERNANDA L.
Resumen
Abstract— This article evaluates the RISC-V Rocket processor
embedded in a Commercial Off-The-Shelf (COTS) SRAM-based
field-programmable gate array (FPGA) under heavy-ionsinduced faults and emulation fault injection. We also analyze
the efficiency of using mitigation techniques based on hardware
redundancy and scrubbing. Results demonstrated an improvement of 3× in the cross section when scrubbing and coarse
grain triple modular redundancy are used. The Rocket processor
presented analogous sensitivity to radiation effects as the state-ofthe-art soft processors. Due to the complexity of the system-onchip, not only the Rocket core but also its peripherals should be
protected with proper solutions. Such solutions should address
the specific vulnerabilities of each component to improve the
overall system reliability while maintaining the trade-off with
performance