Actas de congresos
Horizontal, Stacked or Vertical Silicon Nanowires: Does it Matter from a Low-Frequency Noise Perspective?
Fecha
2020-01-01Registro en:
2020 Joint International Eurosoi Workshop And International Conference On Ultimate Integration On Silicon (eurosoi-ulis). New York: Ieee, 6 p., 2020.
2330-5738
10.1109/EUROSOI-ULIS49407.2020.9365338
WOS:000790086400028
Autor
IMEC
UTFPR
Universidade Estadual Paulista (UNESP)
Universidade de São Paulo (USP)
Katholieke Univ Leuven
Institución
Resumen
This work reviews the low-frequency noise performance of different flavors of silicon Gate-All-Around Nanowire (NW) (or Nanosheet - NS) transistors. For the horizontal devices, the 1/f-like noise is dominated by the number fluctuations mechanism, so that the Power Spectral Density (PSD) is directly proportional with the trap density in the gate stack. The impact of different process options and device architectures (junctionless versus inversion mode) is discussed. Overall, it is found that the average 1/f noise PSD is reducing going from single NW transistors on Silicon-on-Insulator substrates, to stacked horizontal NS devices and, finally, vertical NW FETs. In the latter case, white noise may dominate the lowfrequency noise spectrum.