Analysis and simulation of a 45nm high-K/metal PD-SOI DTMOS under forward bias

dc.contributorAbimael, J.-P., Electrical and Computer Engineering Department, Engineering and Technology Institute of Universidad Autnoma de Ciudad Jurez, Mexico; Ambrosio, R.C.L., Electrical and Computer Engineering Department, Engineering and Technology Institute of Universidad Autnoma de Ciudad Jurez, Mexico; Carlos, A.P.M., Electrical and Computer Engineering Department, Engineering and Technology Institute of Universidad Autnoma de Ciudad Jurez, Mexico; Karim, M.-L., Electrical and Computer Engineering Department, Engineering and Technology Institute of Universidad Autnoma de Ciudad Jurez, Mexico; José, A.M.-G., Engineering Department, Centro Universitario de la Costa sur of Universidad de Guadalajara, Mexico; Zurika, I.B.-G., Electrical and Computer Engineering Department, Engineering and Technology Institute of Universidad Autnoma de Ciudad Jurez, Mexico
dc.creatorAbimael, J.-P.
dc.creatorAmbrosio, R.C.L.
dc.creatorCarlos, A.P.M.
dc.creatorKarim, M.-L.
dc.creatorJose, A.M.-G.
dc.creatorZurika, I.B.-G.
dc.date.accessioned2015-11-18T23:43:43Z
dc.date.accessioned2022-11-02T14:37:28Z
dc.date.available2015-11-18T23:43:43Z
dc.date.available2022-11-02T14:37:28Z
dc.date.created2015-11-18T23:43:43Z
dc.date.issued2011
dc.identifierhttp://hdl.handle.net/20.500.12104/63260
dc.identifier10.1109/ISDRS.2011.6135370
dc.identifierhttp://www.scopus.com/inward/record.url?eid=2-s2.0-84857227934&partnerID=40&md5=00247f36c11e4d400369479bbccb2f3f
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/5001387
dc.description.abstractAs effective gate length and gate oxide thickness in Metal-Oxide- Semiconductor (MOS) transistors are aggressively scaled down for higher performance and circuit density, the levels for gate leakage current [1-2], standby power consumption [1-2] and gate oxide reliability [3] are degraded. Therefore, now hafnium dioxide (HfO 2) is being incorporated into the gate stack of silicon based MOSFETs. © 2011 IEEE.
dc.relation2011 International Semiconductor Device Research Symposium, ISDRS 2011
dc.relationScopus
dc.titleAnalysis and simulation of a 45nm high-K/metal PD-SOI DTMOS under forward bias
dc.typeConference Paper


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