dc.creator | Rangel-Patiño, Francisco E. | |
dc.creator | Chávez-Hurtado, José L. | |
dc.creator | Viveros-Wacher, Andrés | |
dc.creator | Rayas-Sánchez, José E. | |
dc.date.accessioned | 2019-07-23T18:00:54Z | |
dc.date.accessioned | 2022-10-14T12:11:10Z | |
dc.date.available | 2019-07-23T18:00:54Z | |
dc.date.available | 2022-10-14T12:11:10Z | |
dc.date.created | 2019-07-23T18:00:54Z | |
dc.date.issued | 2017-09 | |
dc.identifier | F. E. Rangel-Patiño, J. L. Chávez-Hurtado, A. Viveros-Wacher, J. E. Rayas-Sánchez, and N. Hakim, “System margining surrogate-based optimization in post-silicon validation,” IEEE Trans. Microwave Theory Techn., vol. 65, no. 9, pp. 3109-3115, Sep. 2017. DOI: 10.1109/TMTT.2017.2701368 | |
dc.identifier | 0018-9480 | |
dc.identifier | http://hdl.handle.net/11117/5947 | |
dc.identifier.uri | https://repositorioslatinoamericanos.uchile.cl/handle/2250/4235527 | |
dc.language | eng | |
dc.publisher | IEEE | |
dc.rights | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf | |
dc.subject | DoE | |
dc.subject | Equalization | |
dc.subject | Eye Diagram | |
dc.subject | HSIO | |
dc.subject | Kriging | |
dc.subject | Neural Network | |
dc.subject | Optimization | |
dc.subject | Post-silicon Validation | |
dc.subject | Surrogate Models | |
dc.subject | Receiver | |
dc.subject | Support Vector Machines | |
dc.title | System Margining Surrogate-Based Optimization in Post-Silicon Validation | |
dc.type | info:eu-repo/semantics/article | |