Implementing a highly-linear Voltage-to-time converter circuit for a low power 10-bit 200kS/s SAR ADC with Adaptive Conversion cycle for high-quality audio applications in 0.18um TSMC CMOS process technology

dc.contributorAguilera-Galicia, Cuauhtémoc R.
dc.creatorFigueroa-Vázquez, Cristian F.
dc.date.accessioned2020-11-04T14:59:40Z
dc.date.accessioned2022-10-14T12:06:59Z
dc.date.available2020-11-04T14:59:40Z
dc.date.available2022-10-14T12:06:59Z
dc.date.created2020-11-04T14:59:40Z
dc.date.issued2020-08
dc.identifierFigueroa-Vázquez, C. F. (2020). Implementing a highly-linear Voltage-to-time converter circuit for a low power 10-bit 200kS/s SAR ADC with Adaptive Conversion cycle for high-quality audio applications in 0.18um TSMC CMOS process technology. Trabajo de obtención de grado, Especialidad en Diseño de Sistemas en Chip. Tlaquepaque, Jalisco: ITESO.
dc.identifierhttps://hdl.handle.net/11117/6384
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/4234898
dc.languageeng
dc.publisherITESO
dc.rightshttp://quijote.biblio.iteso.mx/licencias/CC-BY-NC-2.5-MX.pdf
dc.subjectVoltage-to-Time Converter
dc.subjectAnalog to Digital Converter
dc.subjectSuccessive Approximation Register
dc.subjectDigital to Analog Converter
dc.titleImplementing a highly-linear Voltage-to-time converter circuit for a low power 10-bit 200kS/s SAR ADC with Adaptive Conversion cycle for high-quality audio applications in 0.18um TSMC CMOS process technology
dc.typeinfo:eu-repo/semantics/academicSpecialization


Este ítem pertenece a la siguiente institución