Receptor GPS utilizando Dispositivos FPGA

Abstract

This paper presents the implementation of a GNSS receiver that process the navigation data contained in the GPS signal. This prototype is based using a FPGA Platformintegrating all modules included in a GPS Receiver that is based in a Software Defined Radio architecture. The implementation of algorithms on FPGAs programmable logic devices has the purpose of develop a receiver with programmable characteristics which can implement other navigation systems without changing hardware devices and instead updating only a few settings within the developed software application.