dc.contributor | Rayas-Sánchez, José E. | |
dc.contributor | Hakim, Nagib | |
dc.creator | Rangel-Patiño, Francisco E. | |
dc.date.accessioned | 2018-07-31T16:44:55Z | |
dc.date.available | 2018-07-31T16:44:55Z | |
dc.date.created | 2018-07-31T16:44:55Z | |
dc.date.issued | 2018-07 | |
dc.identifier | Rangel-Patiño, F. E. (2018). Transmitter and Receiver Equalizers Optimization Methodologies for High-Speed Links in Industrial Computer Platforms Post-Silicon Validation. Tesis de doctorado, Doctorado en Ciencias de la Ingeniería. Tlaquepaque, Jalisco: ITESO. | |
dc.identifier | http://hdl.handle.net/11117/5527 | |
dc.language | eng | |
dc.publisher | ITESO | |
dc.rights | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-2.5-MX.pdf | |
dc.subject | Eye Diagram | |
dc.subject | Artificial Neural Network | |
dc.subject | Broyden | |
dc.subject | Post-Silicon Validation | |
dc.subject | Receptor HSIO | |
dc.subject | Kriging | |
dc.subject | Space Mapping | |
dc.subject | Surrogate Models | |
dc.subject | Support Vector Machines | |
dc.subject | System Margining | |
dc.subject | Optimization | |
dc.title | Transmitter and Receiver Equalizers Optimization Methodologies for High-Speed Links in Industrial Computer Platforms Post-Silicon Validation | |
dc.type | info:eu-repo/semantics/doctoralThesis | |