Design and Physical Implementation of an Analog Receiver for a SerDes System on Chip in 130nm CMOS Technology

dc.contributorMartínez-Guerrero, Esteban
dc.contributorJuárez-Hernández, Esdras
dc.creatorConde-Almada, Ernesto
dc.date.accessioned2016-09-06T18:28:01Z
dc.date.available2016-09-06T18:28:01Z
dc.date.created2016-09-06T18:28:01Z
dc.date.issued2016-07
dc.identifierConde-Almada, E. (2016). Design and Physical Implementation of an Analog Receiver for a SerDes System on Chip in 130nm CMOS Technology. Trabajo de obtención de grado, Especialidad en Diseño de Sistemas en Chip. Tlaquepaque, Jalisco: ITESO.
dc.identifierhttp://hdl.handle.net/11117/3848
dc.languageeng
dc.publisherITESO
dc.rightshttp://quijote.biblio.iteso.mx/licencias/CC-BY-NC-2.5-MX.pdf
dc.subjectAnalog
dc.subjectReceiver
dc.subjectPCI Express
dc.subjectSerDes
dc.subjectHigh-Speed I
dc.subjectO’s
dc.subjectDuty Cycle Correction
dc.subjectCML
dc.subjectIC Design
dc.titleDesign and Physical Implementation of an Analog Receiver for a SerDes System on Chip in 130nm CMOS Technology
dc.typeinfo:eu-repo/semantics/academicSpecialization


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