Design optimization of microstrip lines with via fences through surrogate modeling based on polynomial functional interpolants

dc.creatorRayas-Sánchez, José E.
dc.creatorVargas-Chávez, Noel
dc.date.accessioned2013-05-21T19:14:23Z
dc.date.available2013-05-21T19:14:23Z
dc.date.created2013-05-21T19:14:23Z
dc.date.issued2010-10
dc.identifierJ. E. Rayas-Sánchez and N. Vargas-Chávez, “Design optimization of microstrip lines with via fences through surrogate modeling based on polynomial functional interpolants,” in IEEE Conf. Electrical Performance of Electronic Packaging and Systems (EPEPS 2010), Austin, TX, Oct. 2010, pp. 125-128. (E-ISBN: 978-1-4244-6866-9; P-ISBN: 978-1-4244-6865-2; INSPEC: 11664332)
dc.identifierhttp://hdl.handle.net/11117/612
dc.languageeng
dc.publisherIEEE Conf. Electrical Performance of Electronic Packaging and Systems
dc.relationIEEE Conf. Electrical Performance of Electronic Packaging and Systems (EPEPS);2010
dc.rightshttp://quijote.biblio.iteso.mx/licencias/CC-BY-NC-ND-2.5-MX.pdf
dc.subjectCrosstalk
dc.subjectMicrostrip Via Fences
dc.subjectGuard Traces
dc.subjectHigh-speed Interconnects
dc.subjectSignal Integrity
dc.subjectSurrogate Modeling
dc.subjectSpace Mapping
dc.subjectElectromagnetic Based Optimization
dc.titleDesign optimization of microstrip lines with via fences through surrogate modeling based on polynomial functional interpolants
dc.typeinfo:eu-repo/semantics/conferencePaper


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