Actas de congresos
Experimental comparison between relaxed and strained Ge pFinFETs
Fecha
2017-01-01Registro en:
2017 Joint International Eurosoi Workshop And International Conference On Ultimate Integration On Silicon (eurosoi-ulis 2017). New York: Ieee, p. 180-183, 2017.
2330-5738
WOS:000425210900048
0496909595465696
0000-0002-0886-7798
Autor
Universidade de São Paulo (USP)
Universidade Estadual Paulista (Unesp)
Imec
Univ Ghent
Katholieke Univ Leuven
Institución
Resumen
The experimental comparison between relaxed and strained Ge pFinFETs operating at room temperature is discussed. Although, the strain into the channel improves the drain current for wide transistors due to the boost of hole mobility, the gate stack engineering has to be further studied in order to solve the threshold voltage shift. The relaxed channel achieves a lower subthreshold swing compared to the strained one, since the latter presents a higher source/drain leakage current. Considering a figure of merit for analog applications, i.e., intrinsic voltage gain AV, no relevant difference between the relaxed and strained channel performances has been shown for short devices while the relaxed ones present a higher Av for longer devices.