Actas de congresos
Architecting A Computer With A Full Optical Ram
Registro en:
978-1-5090-6113-6
23rd Ieee International Conference On Electronics Circuits And Systems (icecs 2016). Ieee, p. 716 - 719, 2016.
WOS:000399230200185
10.1109/ICECS.2016.7841302
Autor
Gonzalez
Jorge; Orosa
Lois; Azevedo
Rodolfo
Institución
Resumen
On-chip photonics has gained attention in research for high-speed processor communication networks, and recent. developments in optical fabrication techniques and data buffering has offered new opportunities for processor systems. In this work, we evaluate a processor with a full optical main memory system. We design it using recent optical devices that leverages the high-bandwidth optical capabilities to obtain low memory access latency, similar to those in state of the art L2 caches. This characteristic enables the possibility of eliminating the second level of caches, saving processor area. Experimental results show the average speedup is x 1.34 with SPEC2006 and x1.80 with irregular applications. 716 719 23rd IEEE International Conference on Electronics, Circuits and Systems (ICECS) DEC 11-14, 2016 MONACO