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A Holistic Methodology for System Margining and Jitter Tolerance Optimization in Post-Silicon Validation

Rangel-Patiño, Francisco E.; Viveros-Wacher, Andrés; Rayas-Sánchez, José E.; Vega-Ochoa, Edgar A.; Duron-Rosales, Ismael; Hakim, Nagib (IEEE, 2019)

Machine Learning Techniques for Electrical Validation Enhancement Processes

Sánchez-Martínez, César A. (ITESO, 2021)

A Holistic Methodology for System Margining and Jitter Tolerance Optimization in Post-Silicon Validation

Rangel-Patiño, Francisco E.; Viveros-Wacher, Andrés; Rayas-Sánchez, José E.; Vega-Ochoa, Edgar A.; Duron-Rosales, Ismael; Hakim, Nagib (IEEE, 2016-12)

A Holistic Methodology for System Margining and Jitter Tolerance Optimization in Post-Silicon Validation

Rangel-Patiño, Francisco E.; Viveros-Wacher, Andrés; Rayas-Sánchez, José E.; Vega-Ochoa, Edgar A.; Duron-Rosales, Ismael; Hakim, Nagib (IEEE, 2016-12)

Machine Learning Techniques for Electrical Validation Enhancement Processes

Sánchez-Martínez, César A. (ITESO, 2020-12)

Machine Learning Techniques for Electrical Validation Enhancement Processes

Sánchez-Martínez, César A. (ITESO, 2020-12)

Machine Learning Techniques for Electrical Validation Enhancement Processes

Sánchez-Martínez, César A. (ITESO, 2020-12)

Transient stability improvement for electrical power systems based on the impedance change of a transmission system

Universidade Estadual Paulista (Unesp) (2020-06-01)

This study presents a new preventive control model based on sensitivity analysis that aims to improve the transient stability by changing the configuration of the transmission system. By considering a list of severe ...

Transmitter and Receiver Equalizers Optimization Methodologies for High-Speed Links in Industrial Computer Platforms Post-Silicon Validation

Rangel-Patiño, Francisco E. (ITESO, 2018-07)

Transmitter and Receiver Equalizers Optimization Methodologies for High-Speed Links in Industrial Computer Platforms Post-Silicon Validation

Rangel-Patiño, Francisco E. (ITESO, 2018-07)

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A Holistic Methodology for System Margining and Jitter Tolerance Optimization in Post-Silicon Validation

Machine Learning Techniques for Electrical Validation Enhancement Processes

A Holistic Methodology for System Margining and Jitter Tolerance Optimization in Post-Silicon Validation

A Holistic Methodology for System Margining and Jitter Tolerance Optimization in Post-Silicon Validation

Machine Learning Techniques for Electrical Validation Enhancement Processes

Machine Learning Techniques for Electrical Validation Enhancement Processes

Machine Learning Techniques for Electrical Validation Enhancement Processes

Transient stability improvement for electrical power systems based on the impedance change of a transmission system

Transmitter and Receiver Equalizers Optimization Methodologies for High-Speed Links in Industrial Computer Platforms Post-Silicon Validation

Transmitter and Receiver Equalizers Optimization Methodologies for High-Speed Links in Industrial Computer Platforms Post-Silicon Validation