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AES IP Core: hardware criptográfico
(Universidade Estadual Paulista (Unesp), 2016-12-15)
This work developed a FPGA-based cryptographic hardware. The encryption algorithm used was AES-256 implemented in VHDL. The project aimed a balance between hardware footprint and processing speed. Also, through the UART ...
Implementação de um inversor de 9 níveis monofásico controlado por dispositivo FPGA
(Universidade Tecnológica Federal do ParanáCuritibaBrasilCurso de Engenharia de Controle e AutomaçãoUTFPR, 2018-03-13)
This work shows a study about the main topologies of multilevel voltage inverters and of different PWM (Pulse Width Modulation) modulation strategies for developing a cascaded H-bridge multilevel inverter with nine voltage ...
Efficient implementation of the RDM-QIM algorithm in an FPGA
(IEICE Electronics Express, 2009)
Efficient implementation of the RDM-QIM algorithm in an FPGA
(IEICE Electronics Express, 2009)
Síntese de circuitos combinacionais por meio de hardware evolutivo
(Universidade Tecnológica Federal do ParanáPato BrancoBrasilDepartamento Acadêmico de ElétricaEngenharia ElétricaUTFPR, 2019-06-25)
A computational tool for the automatic synthesis of combinational circuits has been developed and implemented whose operation is based on genetic algorithms. In order for the synthesis to occur through the tool, it is ...
Autonomic hardware manager: uma arquitetura de hardware autonômico usando a solução de repositório ativo de componentes
(Universidade Federal do Rio Grande do NorteBrasilUFRNPROGRAMA DE PÓS-GRADUAÇÃO EM ENGENHARIA ELÉTRICA E DE COMPUTAÇÃO, 2015-05-29)
This Thesis main objective is to implement a supporting architecture to
Autonomic Hardware systems, capable of manage the hardware running in
reconfigurable devices. The proposed architecture implements manipulation,
generation ...
Media Independent Interface (MII) implementation and data processing on FPGA for Fast ETHERNET transmission over Plastic Optical Fiber
(Instituto Tecnológico de Costa Rica, 2008)
This thesis focuses on the design and implementation of a Media Converter, which allows Ethernet Communication through 250 meters of Plastic Optical Fiber (POF). Three subsystems constitute this system.
First, a configurable ...