Buscar
Mostrando ítems 1-10 de 952
Comparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures
(2016-09-01)
This paper presents an experimental analysis of the analog application figures of merit: the intrinsic voltage gain (AV) and unit gain frequency, focusing on the performance comparison between silicon triple gate pFinFET ...
The foreign service and the feminine section of fet and the jons. Approaches to latin America (1938-1950)
(Pontificia Universidad Catolica de Chile, 2019)
The following article seeks to analyze two moments of joint work between the Foreign Service and the Feminine Section of the Traditionalist Spanish Falange and the JONS. The first experience is the establishment of the ...
Study of the utbbbe soi tunnel-fet working as a dual-technology transistor
(2021-08-23)
— In this work we further investigate the operation of theBESOI (Back-Enhanced Silicon-On Insulator) Dual-Technology FET, analyzing not only its behavior as a p-type Tunnel-FET when a negative back bias is applied to the ...
Application of UTBB (SOI)-S-BE Tunnel-FET as a Dual-Technology Transistor
(Ieee, 2019-01-01)
In this work we propose for the first time the use of the recently introduced UTBB (SOI)-S-BE TFET (Ultra-Thin Body and Box Back Enhanced Silicon-On-Insulator Tunnel-FET) operating as a MOSFET device only by changing its ...
Application of UTBBBE SOI tunnel-FET as a dual-technology transistor
(2019-08-01)
In this work we propose for the first time the use of the recently introduced UTBBBE SOI TFET (Ultra-Thin Body and Box Back Enhanced Silicon-On-Insulator Tunnel-FET) operating as a MOSFET device only by changing its bias ...
Pros and cons of symmetrical dual-k spacer technology in hybrid FinFETs
(2016-12-01)
The symmetrical dual-k spacer technology in hybrid FinFETs has been widely explored for better electrostatic control of the fin-based devices in nanoscale region. Since, high-k tangible spacer materials are broadly became ...
Low temperature performance of proton irradiated strained SOI FinFET
(2017-06-29)
This paper studies for the first time the low temperature characteristics of strained SOI FinFETs submitted to proton irradiation. Both types of transistors, nMOS and pMOS, were analyzed from room temperature down to 100K, ...
Low temperature performance of proton irradiated strained SOI FinFET
(Ieee, 2017-01-01)
This paper studies for the first time the low temperature characteristics of strained SOI FinFETs submitted to proton irradiation. Both types of transistors, nMOS and pMOS, were analyzed from room temperature down to 100K, ...