| dc.creator | Aguilar,José L | |
| dc.creator | Campero,Kahlil | |
| dc.date | 2014-08-01 | |
| dc.date.accessioned | 2023-09-25T18:35:19Z | |
| dc.date.available | 2023-09-25T18:35:19Z | |
| dc.identifier | http://www.scielo.edu.uy/scielo.php?script=sci_arttext&pid=S0717-50002014000200009 | |
| dc.identifier.uri | https://repositorioslatinoamericanos.uchile.cl/handle/2250/8838482 | |
| dc.description | Developments in parallel architectures are an important branch in computer science. The success of such architectures derives from their inherent ability to improve the program performances. However, their ability to improve the performance on programs depends on the parallelism extraction strategies, which are always limited by the logic of each sequential program. Speculation is the only known alternative to overcome these constraints and increase the parallelism. In this paper, we study the explicit speculative parallelism using a library of thread-level speculation. We present the design of this library and study different speculative models: speculation of decision structures, speculation of loops, and speculation of critical sections. Our study evaluates different cases taken from SPEC CPU 2000, allowing acceleration of about 1.8x in multicore architectures (four core) with coarse-grained multithreaded | |
| dc.format | text/html | |
| dc.language | en | |
| dc.publisher | Centro Latinoamericano de Estudios en Informática | |
| dc.rights | info:eu-repo/semantics/openAccess | |
| dc.source | CLEI Electronic Journal v.17 n.2 2014 | |
| dc.subject | Speculative Parallelism | |
| dc.subject | Parallel Programming | |
| dc.subject | Thread-level Speculation | |
| dc.title | An explicit parallelism study based on thread-level speculation | |
| dc.type | info:eu-repo/semantics/article | |
