Low Voltage Lazzaro's WTA with enhanced loop gain

dc.creatorJOSE MIGUEL ROCHA PEREZ
dc.creatorALEJANDRO DIAZ SANCHEZ
dc.date2012-04-06
dc.date.accessioned2023-07-25T16:24:53Z
dc.date.available2023-07-25T16:24:53Z
dc.identifierhttp://inaoe.repositorioinstitucional.mx/jspui/handle/1009/2066
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/7807248
dc.descriptionAn additional stage for a Low Voltage Lazzaro's Winner Take All (WTA) circuit is introduced. It allows lowering the voltage supply requirements so that it can be functional in fine line CMOS technology. Electrical measurements of a prototype in CMOS 0.5 µm technology verify the operation of the WTA circuit with VDD=1.5V. Simulations in PSpice and stability issues are presented as well.
dc.formatapplication/pdf
dc.languageeng
dc.publisherIEICE Electronics Express
dc.relationcitation:Molinar-Solis, Jesus E., et al., (2012), Low Voltage Lazzaro's WTA with enhanced loop gain, IEICE Electronics Express, Vol. 9(7): 648–653.
dc.rightsinfo:eu-repo/semantics/openAccess
dc.rightshttp://creativecommons.org/licenses/by-nc-nd/4.0
dc.subjectinfo:eu-repo/classification/Inspec/WTA
dc.subjectinfo:eu-repo/classification/Inspec/Low voltage
dc.subjectinfo:eu-repo/classification/Inspec/Non-linear circuits
dc.subjectinfo:eu-repo/classification/cti/1
dc.subjectinfo:eu-repo/classification/cti/22
dc.subjectinfo:eu-repo/classification/cti/2203
dc.subjectinfo:eu-repo/classification/cti/220307
dc.subjectinfo:eu-repo/classification/cti/220307
dc.titleLow Voltage Lazzaro's WTA with enhanced loop gain
dc.typeinfo:eu-repo/semantics/article
dc.typeinfo:eu-repo/semantics/acceptedVersion
dc.audiencestudents
dc.audienceresearchers
dc.audiencegeneralPublic


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