dc.creatorFRANCISCO LOPEZ HUERTA
dc.creatorAGUSTIN LEOBARDO HERRERA MAY
dc.creatorJOHAN JAIR ESTRADA LOPEZ
dc.creatorCARLOS ZUÑIGA ISLAS
dc.creatorBLANCA AURORA CERVANTES SANCHEZ
dc.creatorBLANCA SUSANA SOTO CRUZ
dc.date2011
dc.date.accessioned2023-07-25T16:24:19Z
dc.date.available2023-07-25T16:24:19Z
dc.identifierhttp://inaoe.repositorioinstitucional.mx/jspui/handle/1009/1782
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/7806974
dc.descriptionWe present an alternative post-processing on a CMOS chip to release a planar microelectrode array (pMEA) integrated with its signal readout circuit, which can be used for monitoring the neuronal activity of vestibular ganglion neurons in newborn Wistar strain rats. This chip is fabricated through a 0.6 μm CMOS standard process and it has 12 pMEA through a 4 × 3 electrodes matrix. The alternative CMOS post-process includes the development of masks to protect the readout circuit and the power supply pads. A wet etching process eliminates the aluminum located on the surface of the p+-type silicon. This silicon is used as transducer for recording the neuronal activity and as interface between the readout circuit and neurons. The readout circuit is composed of an amplifier and tunable bandpass filter, which is placed on a 0.015 mm2 silicon area. The tunable bandpass filter has a bandwidth of 98 kHz and a common mode rejection ratio (CMRR) of 87 dB. These characteristics of the readout circuit are appropriate for neuronal recording applications.
dc.formatapplication/pdf
dc.languageeng
dc.publisherSensors MDPI
dc.relationcitation:López-Huerta, F., et al., (2011). Alternative post-processing on a CMOS chip to fabricate a planar microelectrode array, Sensors, (11):10940-10957
dc.rightsinfo:eu-repo/semantics/openAccess
dc.rightshttp://creativecommons.org/licenses/by-nc-nd/4.0
dc.subjectinfo:eu-repo/classification/CMOS chip/CMOS chip
dc.subjectinfo:eu-repo/classification/Microelectrode array/Microelectrode array
dc.subjectinfo:eu-repo/classification/CMOS post-process/CMOS post-process
dc.subjectinfo:eu-repo/classification/Vestibular ganglion neurons/Vestibular ganglion neurons
dc.subjectinfo:eu-repo/classification/cti/1
dc.subjectinfo:eu-repo/classification/cti/22
dc.subjectinfo:eu-repo/classification/cti/2203
dc.subjectinfo:eu-repo/classification/cti/2203
dc.titleAlternative post-processing on a CMOS chip to fabricate a planar microelectrode array
dc.typeinfo:eu-repo/semantics/article
dc.typeinfo:eu-repo/semantics/acceptedVersion
dc.audiencestudents
dc.audienceresearchers
dc.audiencegeneralPublic


Este ítem pertenece a la siguiente institución