Impedance matching of traces and multilayer via transitions for on-package links

dc.creatorGaudencio Hernández Sosa
dc.creatorReydezel Torres Torres
dc.date2011
dc.date.accessioned2023-07-25T16:24:19Z
dc.date.available2023-07-25T16:24:19Z
dc.identifierhttp://inaoe.repositorioinstitucional.mx/jspui/handle/1009/1779
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/7806971
dc.descriptionA method for achieving impedance matching between traces and multilayer via transitions in on-package chip-to-chip links is presented. The method allows determining of the geometry for minimizing the return loss when a signal propagates through the link. For this purpose, analytical equations are derived using a physically-based equivalent circuit to represent the input impedance of multilayer via transitions. S -parameter measurements performed to optimized links using the method demonstrate the usefulness of the proposal.
dc.formatapplication/pdf
dc.languageeng
dc.publisherIEEE
dc.relationcitation:Hernandez-Sosa, G., et al., (2011). Impedance matching of traces and multilayer via transitions for on-package links, IEEE Microwave and Wireless Components Letters, Vol. 21, (11): 595-597
dc.rightsinfo:eu-repo/semantics/openAccess
dc.rightshttp://creativecommons.org/licenses/by-nc-nd/4.0
dc.subjectinfo:eu-repo/classification/Impedance matching/Impedance matching
dc.subjectinfo:eu-repo/classification/Return loss/Return loss
dc.subjectinfo:eu-repo/classification/Vias/Vias
dc.subjectinfo:eu-repo/classification/cti/1
dc.subjectinfo:eu-repo/classification/cti/22
dc.subjectinfo:eu-repo/classification/cti/2203
dc.subjectinfo:eu-repo/classification/cti/2203
dc.titleImpedance matching of traces and multilayer via transitions for on-package links
dc.typeinfo:eu-repo/semantics/article
dc.typeinfo:eu-repo/semantics/acceptedVersion
dc.audiencestudents
dc.audienceresearchers
dc.audiencegeneralPublic


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