dc.creatorEMMANUEL TORRES RIOS
dc.creatorREYDEZEL TORRES TORRES
dc.creatorROBERTO STACK MURPHY ARTEAGA
dc.creatorEDMUNDO ANTONIO GUTIERREZ DOMINGUEZ
dc.date2008
dc.date.accessioned2023-07-25T16:23:21Z
dc.date.available2023-07-25T16:23:21Z
dc.identifierhttp://inaoe.repositorioinstitucional.mx/jspui/handle/1009/1286
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/7806482
dc.descriptionA new modeling and parameter extraction methodology to represent the parasitic effects associated with shielded test structures is presented in this paper. This methodology allows to accurately account for the undesired effects introduced by the test fixture when measuring on-wafer devices at high frequencies. Since the proposed models are based on the physical effects associated with the structure, the obtained parameters allow the identification of the most important parasitic components, which lead to potential measurement uncertainty when characterizing high-frequency devices. The proposed methodology is applied to structures fabricated on different metal levels in order to point out the advantages and disadvantages in each case. The validity of the modeling and characterization methodology is verified by achieving excellent agreement between simulations and experimental data up to 50 GHz.
dc.formatapplication/pdf
dc.languageeng
dc.publisherWorld Scientific Publishing Company
dc.relationcitation:Rios-Torres, E., et al., (2008). Analytical characterization and modeling of shielded test structures for RF-CMOS, International Journal of High Speed Electronics and Systems Vol. 18, (4): 793–803
dc.rightsinfo:eu-repo/semantics/openAccess
dc.rightshttp://creativecommons.org/licenses/by-nc-nd/4.0
dc.subjectinfo:eu-repo/classification/Modeling/Modeling
dc.subjectinfo:eu-repo/classification/RF-CMOS/RF-CMOS
dc.subjectinfo:eu-repo/classification/Semiconductor device measurements/Semiconductor device measurements
dc.subjectinfo:eu-repo/classification/Microwave measurements/Microwave measurements
dc.subjectinfo:eu-repo/classification/cti/1
dc.subjectinfo:eu-repo/classification/cti/22
dc.subjectinfo:eu-repo/classification/cti/2203
dc.subjectinfo:eu-repo/classification/cti/2203
dc.titleAnalytical characterization and modeling of shielded test structures for RF-CMOS
dc.typeinfo:eu-repo/semantics/article
dc.typeinfo:eu-repo/semantics/acceptedVersion
dc.audiencestudents
dc.audienceresearchers
dc.audiencegeneralPublic


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