dc.creatorFERNANDO MARTIN DEL CAMPO RAMIREZ
dc.creatorRENE ARMANDO CUMPLIDO PARRA
dc.creatorJOSE ROBERTO PEREZ ANDRADE
dc.creatorALDO GUSTAVO OROZCO LUGO
dc.date2009
dc.date.accessioned2023-07-25T16:23:08Z
dc.date.available2023-07-25T16:23:08Z
dc.identifierhttp://inaoe.repositorioinstitucional.mx/jspui/handle/1009/1171
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/7806369
dc.descriptionChannel estimation in wireless communication systems is usually accomplished by inserting, along with the information, a series of known symbols, whose analysis is used to define the parameters of the filters that remove the distortion of the data. Nevertheless, a part of the available bandwidth has to be destined to these symbols. Until now, no alternative solution has demonstrated to be fully satisfying for commercial use, but one technique that looks promising is superimposed training (ST). This work describes a hybrid software-hardware FPGA implementation of a recent algorithm that belongs to the ST family, known as Datadependent Superimposed Training (DDST), which does not need extra bandwidth for its training sequences (TS) as it adds them arithmetically to the data. DDST also adds a third sequence known as data-dependent sequence, that destroys the interference caused by the data over the TS. As DDST’s computational burden is too high for the commercial processors used in mobile systems, a System on a Programmable Chip (SOPC) approach is used in order to solve the problem.
dc.formatapplication/pdf
dc.languageeng
dc.publisherHindawi Publishing Corporation
dc.relationcitation:Martín del Campo, F., et al. A system on a programmable chip architecture for data-dependent superimposed training channel estimation, International Journal of Reconfigurable Computing, Vol. (2009): 1-10
dc.rightsinfo:eu-repo/semantics/openAccess
dc.rightshttp://creativecommons.org/licenses/by-nc-nd/4.0
dc.subjectinfo:eu-repo/classification/cti/1
dc.subjectinfo:eu-repo/classification/cti/12
dc.subjectinfo:eu-repo/classification/cti/1203
dc.subjectinfo:eu-repo/classification/cti/1203
dc.titleA system on a programmable chip architecture for data-dependent superimposed training channel estimation
dc.typeinfo:eu-repo/semantics/article
dc.typeinfo:eu-repo/semantics/acceptedVersion
dc.audiencestudents
dc.audienceresearchers
dc.audiencegeneralPublic


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