| dc.creator | CARLOS MUÑIZ MONTERO | |
| dc.creator | ALEJANDRO DIAZ SANCHEZ | |
| dc.creator | JOSE MIGUEL ROCHA PEREZ | |
| dc.date | 2007-07 | |
| dc.date.accessioned | 2023-07-25T16:22:35Z | |
| dc.date.available | 2023-07-25T16:22:35Z | |
| dc.identifier | http://inaoe.repositorioinstitucional.mx/jspui/handle/1009/896 | |
| dc.identifier.uri | https://repositorioslatinoamericanos.uchile.cl/handle/2250/7806096 | |
| dc.description | Four continuous-time strategies to improve the
speed–accuracy–power tradeoff in CMOS amplifiers by
using low-power offset-compensation circuits are presented.
The offset contribution at the output voltage is
extracted and used to modify the DC component of the
input voltage or the value of the active load, through low
frequency feedback loops, which are realized using two
transistors operating in weak inversion and a small
capacitor. Because these circuits do not affect the bandwidth
and allow using small transistors, the power consumption
is greatly reduced with respect to an
uncompensated amplifier of the same speed and offset
behavior. The proposed strategies present reduced costs in
area, power consumption and complexity, and a decrease in
the low frequency noise contributions. MonteCarlo,
HSPICE simulations results of common source, class AB
and fully differential amplifiers, and experimental results of
a class AB amplifier, all implemented in a 0.5-lm CMOS
technology are shown. Statistical analyses of these strategies
are also presented. Improvements up to 99.74% and
398.6% in the offset and the power consumption are
respectively observed. | |
| dc.format | application/pdf | |
| dc.language | eng | |
| dc.publisher | Springer | |
| dc.relation | citation:Carlos Muñiz-Montero | |
| dc.relation | citation:Alejandro Díaz-Sánchez | |
| dc.relation | citation:Jose Miguel Rocha-Pérez | |
| dc.rights | info:eu-repo/semantics/openAccess | |
| dc.rights | http://creativecommons.org/licenses/by-nc-nd/4.0 | |
| dc.subject | info:eu-repo/classification/CMOS amplifiers/CMOS amplifiers | |
| dc.subject | info:eu-repo/classification/Floating gate transistors/Floating gate transistors | |
| dc.subject | info:eu-repo/classification/Mismatch/Mismatch | |
| dc.subject | info:eu-repo/classification/Offset compensation/Offset compensation | |
| dc.subject | info:eu-repo/classification/cti/1 | |
| dc.subject | info:eu-repo/classification/cti/22 | |
| dc.subject | info:eu-repo/classification/cti/2203 | |
| dc.subject | info:eu-repo/classification/cti/2203 | |
| dc.title | New strategies to improve offset and the speed–accuracy–power tradeoff in CMOS amplifiers | |
| dc.type | info:eu-repo/semantics/article | |
| dc.type | info:eu-repo/semantics/acceptedVersion | |
| dc.audience | students | |
| dc.audience | researchers | |
| dc.audience | generalPublic | |
