dc.contributorJOSE ALEJANDRO DIAZ MENDEZ
dc.contributorMIGUEL ANGEL GARCIA ANDRADE
dc.creatorEDGAR LOPEZ DELGADILLO
dc.date2010-07
dc.date.accessioned2023-07-25T16:21:46Z
dc.date.available2023-07-25T16:21:46Z
dc.identifierhttp://inaoe.repositorioinstitucional.mx/jspui/handle/1009/521
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/7805739
dc.descriptionIn this thesis a system for on-die automatic impedance matching in current mode off-chip signaling is described. In order to perform the automatic matching operation an algorithm that integrates the sign of the impedance matching error and the sign of the coupling branch current is implemented. The advantage of this algorithm is that it works without interfering with the driver operation. The transistor level circuit implementation of the system is described and computer simulations at behavioral level and post layout extractions are presented. Also experimental results are shown for programmable resistor circuits and the full impedance matching system.
dc.formatapplication/pdf
dc.languageeng
dc.publisherInstituto Nacional de Astrofísica, Óptica y Electrónica
dc.relationcitation:Lopez-Delgadillo E.
dc.rightsinfo:eu-repo/semantics/openAccess
dc.rightshttp://creativecommons.org/licenses/by-nc-nd/4.0
dc.subjectinfo:eu-repo/classification/Circuitos programables/Programmable circuits
dc.subjectinfo:eu-repo/classification/Emparejamiento de impedancia/Impedance matching
dc.subjectinfo:eu-repo/classification/Driver circuits/Driver circuits
dc.subjectinfo:eu-repo/classification/Sistemas adaptativos/Adaptive systems
dc.subjectinfo:eu-repo/classification/cti/1
dc.subjectinfo:eu-repo/classification/cti/22
dc.subjectinfo:eu-repo/classification/cti/2203
dc.subjectinfo:eu-repo/classification/cti/2203
dc.titleImpedance matching techniques for current mode off-chip signaling
dc.typeinfo:eu-repo/semantics/doctoralThesis
dc.typeinfo:eu-repo/semantics/acceptedVersion
dc.audiencestudents
dc.audienceresearchers
dc.audiencegeneralPublic


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