| dc.contributor | ESTEBAN TLELO CUAUTLE | |
| dc.creator | JOSE LUIS VALTIERRA SANCHEZ DE LA VEGA | |
| dc.date | 2014-10 | |
| dc.date.accessioned | 2023-07-25T16:21:07Z | |
| dc.date.available | 2023-07-25T16:21:07Z | |
| dc.identifier | http://inaoe.repositorioinstitucional.mx/jspui/handle/1009/211 | |
| dc.identifier.uri | https://repositorioslatinoamericanos.uchile.cl/handle/2250/7805432 | |
| dc.description | Random number generators are a fundamental component in cryptographic applications
such as key generation and digital signatures. Software based solutions have proven effective
in some situations, nevertheless, the need for hardware integrated circuit (IC)
random number generators based on truly random physical phenomena has been recognized
by major information technology companies. Discrete time chaotic dynamical
systems exhibit properties such as extreme sensitivity to the initial conditions and noiselike
trajectories. These properties in combination with an initial condition set by thermal
noise produce a highly unpredictable output suitable for truly random number generation.
However, discrete time chaotic systems based IC true random number generators
are not without problems. Several design considerations have to be made in order to
maintain the properties of the chaotic dynamical system based circuit at the heart of the
true random number generator. In this work, design guidelines aimed at guaranteeing
the correct operation of a proposed discrete time chaotic circuit are obtained through
mathematical modeling. A true random number generation scheme based on the proposed
circuit is then introduced. Finally, the suitability of the scheme as a true random
number generator is validated with the NIST test suite 800-22. | |
| dc.format | application/pdf | |
| dc.language | eng | |
| dc.publisher | Instituto Nacional de Astrofísica, Óptica y Electrónica | |
| dc.relation | citation:Valtierra-Sanchez-de-la-Vega J.L. | |
| dc.rights | info:eu-repo/semantics/openAccess | |
| dc.rights | http://creativecommons.org/licenses/by-nc-nd/4.0 | |
| dc.subject | info:eu-repo/classification/Caos/Chaos | |
| dc.subject | info:eu-repo/classification/Generación de números aleatorios/Random number generation | |
| dc.subject | info:eu-repo/classification/Circuitos integrados analógicos/Analogue integrated circuits | |
| dc.subject | info:eu-repo/classification/Osciladores/Oscillators | |
| dc.subject | info:eu-repo/classification/Generador de caos/Chaos generator | |
| dc.subject | info:eu-repo/classification/Circuitos integrados/Mixed analogue-digital integrated circuit | |
| dc.subject | info:eu-repo/classification/cti/1 | |
| dc.subject | info:eu-repo/classification/cti/22 | |
| dc.subject | info:eu-repo/classification/cti/2203 | |
| dc.subject | info:eu-repo/classification/cti/2203 | |
| dc.title | Design criteria for a discrete time chaos based CMOS true random number generator | |
| dc.type | info:eu-repo/semantics/masterThesis | |
| dc.type | info:eu-repo/semantics/acceptedVersion | |
| dc.audience | students | |
| dc.audience | researchers | |
| dc.audience | generalPublic | |
