dc.contributorGilberto Medeiros Ribeiro
dc.contributorhttp://lattes.cnpq.br/1681880375960859
dc.contributorJanaina Goncalves Guimarães
dc.contributorJosé Alexandre Diniz
dc.contributorJhonattan Córdoba Ramírez
dc.contributorWagner Nunes Rodrigues
dc.creatorWellington de Oliveira Avelino
dc.date.accessioned2023-04-25T17:13:18Z
dc.date.accessioned2023-06-16T15:16:57Z
dc.date.available2023-04-25T17:13:18Z
dc.date.available2023-06-16T15:16:57Z
dc.date.created2023-04-25T17:13:18Z
dc.date.issued2022-05-20
dc.identifierhttp://hdl.handle.net/1843/52456
dc.identifierhttps://orcid.org/0000-0002-9273-9827
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/6678454
dc.description.abstractArtificial intelligence (AI) applications are increasingly present and necessary, especially neural networks (NN). The limited scalability of CMOS (complementary metal-oxide-semiconductor) technology and the increasing computational complexity of these applications require more energy efficiency and scalable hardware implementations. The main computational primitives of NNs are multiply-and-accumulate operations that lead to a significant data movement between memory and processing unit on von Neumann-based computational architectures. A promising alternative is the mimicry of event-based computing, as in neuromorphic systems, co-locating memory and processing. New neurologic-inspired circuit elements represent a new alternative to achieve the much-desired computational efficiency of the brain, among them, a series of nanoscale devices, known as memristors, were proposed to be used as fundamental elements in the creation of artificial synapses and neurons. In this scenario, the efforts of this work aim to boost the implementation of memristor-based spiking neural networks (SNN) to technological maturity. This thesis focuses on constructive aspects of networks, highlighting methodologies for network element coupling, establishing satisfactory conditions to maximize efficiency in information processing and implementation of local training techniques. For this purpose, a testing platform and a graphical user interface environment were specially developed for a demonstration of a fully hardware neural network based on memristive synapses, neuron circuits from NDR devices (negative differential resistance) and complementary circuits. In addition, prototypical experiments were demonstrated to validate inference and learning in neural networks from these components.
dc.publisherUniversidade Federal de Minas Gerais
dc.publisherBrasil
dc.publisherENG - DEPARTAMENTO DE ENGENHARIA ELÉTRICA
dc.publisherPrograma de Pós-Graduação em Engenharia Elétrica
dc.publisherUFMG
dc.rightsAcesso Aberto
dc.subjectInteligência artificial
dc.subjectSistemas neuromórficos
dc.subjectMemristores
dc.subjectRedes neurais por pulsos
dc.subjectTreinamento local
dc.subjectTransportadores de corrente de segunda geração
dc.titleImplementação de redes neurais por pulsos a partir de sinapses memristivas
dc.typeTese


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