dc.creator | Alejos-Jiménez, Jesús R. | |
dc.date.accessioned | 2017-11-30T20:24:23Z | |
dc.date.accessioned | 2022-09-07T17:49:15Z | |
dc.date.accessioned | 2023-03-13T20:15:11Z | |
dc.date.available | 2017-11-30T20:24:23Z | |
dc.date.available | 2022-09-07T17:49:15Z | |
dc.date.available | 2023-03-13T20:15:11Z | |
dc.date.created | 2017-11-30T20:24:23Z | |
dc.date.created | 2022-09-07T17:49:15Z | |
dc.date.issued | 2017-11 | |
dc.identifier | Alejos-Jiménez, J. R. (2017). High-Frequency Electronic Design Optimization Using Simulated Annealing. Trabajo de obtención de grado, Maestría en Diseño Electrónico. Tlaquepaque, Jalisco: ITESO. | |
dc.identifier | http://148.201.128.228:8080/xmlui/handle/20.500.12032/4806 | |
dc.identifier.uri | https://repositorioslatinoamericanos.uchile.cl/handle/2250/6167631 | |
dc.language | eng | |
dc.publisher | ITESO | |
dc.rights | http://quijote.biblio.iteso.mx/licencias/CC-BY-NC-2.5-MX.pdf | |
dc.subject | High-frequency Electronic Design | |
dc.subject | Simulated Annealing | |
dc.subject | Optimization | |
dc.title | High-Frequency Electronic Design Optimization Using Simulated Annealing | |
dc.type | info:eu-repo/semantics/masterThesis | |