dc.contributor | Universidade Estadual Paulista (UNESP) | |
dc.contributor | University of New Brunswick | |
dc.date.accessioned | 2022-04-29T08:28:04Z | |
dc.date.accessioned | 2022-12-20T02:41:58Z | |
dc.date.available | 2022-04-29T08:28:04Z | |
dc.date.available | 2022-12-20T02:41:58Z | |
dc.date.created | 2022-04-29T08:28:04Z | |
dc.date.issued | 2018-07-02 | |
dc.identifier | Proceedings of the 2018 8th International Symposium on Embedded Computing and System Design, ISED 2018, p. 58-62. | |
dc.identifier | http://hdl.handle.net/11449/228683 | |
dc.identifier | 10.1109/ISED.2018.8704098 | |
dc.identifier | 2-s2.0-85065963720 | |
dc.identifier.uri | https://repositorioslatinoamericanos.uchile.cl/handle/2250/5408818 | |
dc.description.abstract | IBM's quantum computers implement gates from Clifford +T gate library. All single qubit gates are implemented, but only a subset of the possible CNOT are provided. It is well known that the functionally of the missing gates can be achieved by a sequence of gates. The sequence of gates is based on SWAP gates. Up to seven elementary gates are required to implement a SWAP gate. In this paper we show how the same effect can be achieved with fewer gates. To show the potential of the proposed transformations, an example is presented where a reduction of 44% in the gate count and a 26% reduction in the number of levels for IBM's QX5 computer is achieved. An algorithm that is considered state of the art, is used for the comparison. | |
dc.language | eng | |
dc.relation | Proceedings of the 2018 8th International Symposium on Embedded Computing and System Design, ISED 2018 | |
dc.source | Scopus | |
dc.title | Efficient Realizations of CNOT gates in IBM's Quantum Computers | |
dc.type | Actas de congresos | |