dc.contributorUniversidade Estadual Paulista (UNESP)
dc.date.accessioned2022-04-28T19:44:50Z
dc.date.accessioned2022-12-20T01:24:48Z
dc.date.available2022-04-28T19:44:50Z
dc.date.available2022-12-20T01:24:48Z
dc.date.created2022-04-28T19:44:50Z
dc.date.issued2021-01-01
dc.identifierLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), v. 12870 LNCS, p. 3-17.
dc.identifier1611-3349
dc.identifier0302-9743
dc.identifierhttp://hdl.handle.net/11449/222470
dc.identifier10.1007/978-3-030-85262-7_1
dc.identifier2-s2.0-85115447282
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/5402600
dc.description.abstractPrevious work proposed and evaluated Speculative taskloop (STL) on Intel Core implementing new clauses and constructs in OpenMP. The results indicated that, despite achieving some speed-ups, there was a phenomenon called the Lost-Thread Effect that caused the performance degradation of STL parallelization. This issue is caused by the nonmonotonic scheduling implemented in the LLVM OpenMP Runtime Library. This paper presents an improvement in the STL mechanism by modifying the OpenMP runtime to allow monotonic scheduling of tasks generated by taskloop. We perform an evaluation with two different versions of the OpenMP runtime, both optimized for STL revealing that, for certain loops, infinite slowdowns (deadlocks) using the original OpenMP runtime can be transformed in speed-ups by applying monotonic scheduling. The experimental results show the performance improvement of STL using the modified version of the runtime, reaching speed-ups of up to 2.18 ×.
dc.languageeng
dc.relationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
dc.sourceScopus
dc.subjectOpenMP
dc.subjectSpeculative parallelization
dc.subjecttaskloop
dc.titleImproving Speculative taskloop in Hardware Transactional Memory
dc.typeActas de congresos


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