dc.contributor | Universidade de São Paulo (USP) | |
dc.date.accessioned | 2022-04-28T19:03:33Z | |
dc.date.accessioned | 2022-12-20T01:01:31Z | |
dc.date.available | 2022-04-28T19:03:33Z | |
dc.date.available | 2022-12-20T01:01:31Z | |
dc.date.created | 2022-04-28T19:03:33Z | |
dc.date.issued | 2001-01-01 | |
dc.identifier | Proceedings - 14th Symposium on Integrated Circuits and Systems Design, SBCCI 2001, p. 142-147. | |
dc.identifier | http://hdl.handle.net/11449/220615 | |
dc.identifier | 10.1109/SBCCI.2001.953017 | |
dc.identifier | 2-s2.0-84966415577 | |
dc.identifier.uri | https://repositorioslatinoamericanos.uchile.cl/handle/2250/5400744 | |
dc.description.abstract | This paper presents a synthesis tool that was developed for generating analogue signals using only digital resources. With the specification at the equation level, the corresponding specification in hardware description language was obtained for a certain analogue signal. The tool developed in C language works with the analogue function, which is implemented by transforming it in a file with the extension TDF, that is the input for AHDL (Altera Hardware Description Language). Using the Max+Plus II project environment, the file obtained was synthesized at the logic gate level, in order to be implemented in a FPGA. Analogue waveforms of practical use, for instance, sine, sigmoid and Gaussian, were modeled with different amounts of bits, synthesized and implemented. Tests show the precision and the efficiency of the developed tool. The waveforms were obtained in the MatLab program and then visualized in a digital oscilloscope. | |
dc.language | eng | |
dc.relation | Proceedings - 14th Symposium on Integrated Circuits and Systems Design, SBCCI 2001 | |
dc.source | Scopus | |
dc.subject | AHDL | |
dc.subject | Analogue signal | |
dc.subject | FPGA | |
dc.title | An environment to aid the synthesis of three-phase analogue waveform using AHDL | |
dc.type | Actas de congresos | |