dc.contributor | Universidade Estadual Paulista (Unesp) | |
dc.contributor | Centro Universitário FEI-São Bernardo Do Campo | |
dc.date.accessioned | 2020-12-12T01:09:54Z | |
dc.date.accessioned | 2022-12-19T20:39:47Z | |
dc.date.available | 2020-12-12T01:09:54Z | |
dc.date.available | 2022-12-19T20:39:47Z | |
dc.date.created | 2020-12-12T01:09:54Z | |
dc.date.issued | 2019-08-01 | |
dc.identifier | SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices. | |
dc.identifier | http://hdl.handle.net/11449/198332 | |
dc.identifier | 10.1109/SBMicro.2019.8919314 | |
dc.identifier | 2-s2.0-85077193838 | |
dc.identifier.uri | https://repositorioslatinoamericanos.uchile.cl/handle/2250/5378966 | |
dc.description.abstract | In this paper, a lateral PIN photodiode based on a SOI wafer has been studied through numerical simulations. This device can be used as a solar cell embedded in a CMOS circuit in order to propose autonomous ultralow-power circuits (ULP). Efficiency behavior has been analyzed for different semiconductor materials and configurations in order to reach the best performance. The results indicate that a layer with a different semiconductor, with different characteristics such as forbidden band, mobility and light absorption, improves the generated power in the device, suggesting that the cell can feed circuits that need larger power. | |
dc.language | eng | |
dc.relation | SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices | |
dc.source | Scopus | |
dc.subject | Germanium | |
dc.subject | Multi-layer | |
dc.subject | PIN photodiode | |
dc.subject | Solar cells | |
dc.title | Multi-layers lateral SOI PIN photodiodes for solar cells applications | |
dc.type | Actas de congresos | |