Multi-layers lateral SOI PIN photodiodes for solar cells applications

dc.contributorUniversidade Estadual Paulista (Unesp)
dc.contributorCentro Universitário FEI-São Bernardo Do Campo
dc.date.accessioned2020-12-12T01:09:54Z
dc.date.accessioned2022-12-19T20:39:47Z
dc.date.available2020-12-12T01:09:54Z
dc.date.available2022-12-19T20:39:47Z
dc.date.created2020-12-12T01:09:54Z
dc.date.issued2019-08-01
dc.identifierSBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices.
dc.identifierhttp://hdl.handle.net/11449/198332
dc.identifier10.1109/SBMicro.2019.8919314
dc.identifier2-s2.0-85077193838
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/5378966
dc.description.abstractIn this paper, a lateral PIN photodiode based on a SOI wafer has been studied through numerical simulations. This device can be used as a solar cell embedded in a CMOS circuit in order to propose autonomous ultralow-power circuits (ULP). Efficiency behavior has been analyzed for different semiconductor materials and configurations in order to reach the best performance. The results indicate that a layer with a different semiconductor, with different characteristics such as forbidden band, mobility and light absorption, improves the generated power in the device, suggesting that the cell can feed circuits that need larger power.
dc.languageeng
dc.relationSBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices
dc.sourceScopus
dc.subjectGermanium
dc.subjectMulti-layer
dc.subjectPIN photodiode
dc.subjectSolar cells
dc.titleMulti-layers lateral SOI PIN photodiodes for solar cells applications
dc.typeActas de congresos


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