Application of UTBB (SOI)-S-BE Tunnel-FET as a Dual-Technology Transistor

dc.contributorUniversidade de São Paulo (USP)
dc.contributorUniversidade Estadual Paulista (Unesp)
dc.date.accessioned2020-12-10T17:32:57Z
dc.date.accessioned2022-12-19T20:03:54Z
dc.date.available2020-12-10T17:32:57Z
dc.date.available2022-12-19T20:03:54Z
dc.date.created2020-12-10T17:32:57Z
dc.date.issued2019-01-01
dc.identifier2019 34th Symposium On Microelectronics Technology And Devices (sbmicro 2019). New York: Ieee, 4 p., 2019.
dc.identifierhttp://hdl.handle.net/11449/195390
dc.identifierWOS:000534490900023
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/5376027
dc.description.abstractIn this work we propose for the first time the use of the recently introduced UTBB (SOI)-S-BE TFET (Ultra-Thin Body and Box Back Enhanced Silicon-On-Insulator Tunnel-FET) operating as a MOSFET device only by changing its bias condition. The principle is based on the carrier type generated by the back gate electric field. For negative back gate and drain biases applied in the device studied in this work, it works like a pTFET, while for positive ones it operates as an nMOS. TCAD device simulation was used for the proof of concept.
dc.languageeng
dc.publisherIeee
dc.relation2019 34th Symposium On Microelectronics Technology And Devices (sbmicro 2019)
dc.sourceWeb of Science
dc.subjectSilicon-On-Insulator (SOI)
dc.subjectTunnel-FET
dc.subjectMOSFET
dc.subjectReconfigurable transistor
dc.subjectdual technology transistor
dc.titleApplication of UTBB (SOI)-S-BE Tunnel-FET as a Dual-Technology Transistor
dc.typeActas de congresos


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