dc.contributorNeves Junior, Paulo de Tarso
dc.creatorWoss, Anderson Carlos
dc.date.accessioned2020-11-19T13:08:10Z
dc.date.accessioned2022-12-06T14:09:13Z
dc.date.available2020-11-19T13:08:10Z
dc.date.available2022-12-06T14:09:13Z
dc.date.created2020-11-19T13:08:10Z
dc.date.issued2014-08-04
dc.identifierWOSS, Anderson Carlos. Implementação de um algoritmo de comunicação embarcado em dispositivo lógico programável com aplicação de técnica de multiplexação em frequência. 2014. 88 f. Trabalho de Conclusão de Curso (Graduação) – Universidade Tecnológica Federal do Paraná, Toledo, 2014.
dc.identifierhttp://repositorio.utfpr.edu.br/jspui/handle/1/15819
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/5242192
dc.description.abstractThis paper describes the process of implementation in VHDL (VHSIC Hardware Description Language) of a communication algorithm with applications of OFDM (Orthogonal Frequency-Divide Multiplexing) technique and QAM (Quadrature Amplitude Modulation). The modulation can be done by Fourier transform or the fast Fourier transform (FFT) when digitally. Thus, the FFT is implemented based on the Cooley-Tukey algorithm, in the Radix-2 configuration, with a length of eight points, using numbers in floating-point representation of 32 bits. The code developed was synthesized in Altera Quartus II and simulated in ModelSim. As a result, it was possible to transmit a text of 561 characters successfully, from functional simulation, at a rate of 34.5 MB/s using a clock of 50 MHz, with possible recovery without errors at the receiver, however, due to the floating-point multiplications and structure adopted for the FFT, the synthesized code demanded more resources than available devices contained and was not possible embed it.
dc.publisherUniversidade Tecnológica Federal do Paraná
dc.publisherToledo
dc.subjectDispositivo de lógica programável
dc.subjectVHDL (Linguagem descritiva de hardware)
dc.subjectCircuitos integrados - Simulação por computador
dc.subjectArranjos de lógica programável em campo
dc.subjectMultiplexação
dc.subjectRádio - Receptores e recepção
dc.subjectProgrammable logic devices
dc.subjectVHDL (Computer hardware description language)
dc.subjectIntegrated circuits - Computer simulation
dc.subjectField programmable gate arrays
dc.subjectMultiplexing
dc.subjectRadio - Receivers and reception
dc.titleImplementação de um algoritmo de comunicação embarcado em dispositivo lógico programável com aplicação de técnica de multiplexação em frequência
dc.typebachelorThesis


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