dc.creatorMolina Robles, Roberto
dc.creatorGarcía Ramírez, Ronny
dc.creatorChacón Rodríguez, Alfonso
dc.creatorRimolo Donadio, Renato
dc.creatorArnaud Maceira, Alfredo
dc.date.accessioned2021-10-21T20:27:37Z
dc.date.accessioned2022-11-15T22:25:37Z
dc.date.available2021-10-21T20:27:37Z
dc.date.available2022-11-15T22:25:37Z
dc.date.created2021-10-21T20:27:37Z
dc.date.issued2021-04
dc.identifierhttps://hdl.handle.net/10895/1551
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/5198225
dc.description.abstractThe RISC-V architecture is a very attractive option for developing application specific systems needing an affordable yet efficient central processing unit. Post-silicon validation on RISC-V applications has been done in industry for a while, however documentation is scarce. This paper proposes a practical low-cost post-silicon testing framework applied to a RISC-V RV32I based microcontroller. The framework uses FPGA-based emulation as a cornerstone to test the microcontroller before and after its fabrication. The platform only requires a handful of elements like the FPGA, a PC, the fabricated chip and some discrete components, without losing the capacity to functionally validate the design under test and save development testing time by using a re-utilize philosophy.
dc.languageen
dc.publisherIEEE
dc.relationIEEE Latin America Electron Devices Conference, (LAEDC), 2021.
dc.rightsLicencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC BY-NC-ND 4.0)
dc.subjectPost-silicon validation
dc.subjectTesting
dc.subjectFPGA
dc.subjectRISC-V
dc.subjectMicrocontroller
dc.subjectEDA tools
dc.subjectArchitecture
dc.subjectTest generation
dc.subjectI/O protocols
dc.subjectSPI
dc.subjectTesting-plataforms
dc.titleAn affordable post-silicon testing framework applied to a RISC-V based microcontroller
dc.typeArtículo


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