uRT51: An Embedded Real-Time processor implemented on FPGA devices

dc.creatorCayssials, Ricardo Luis
dc.creatorDuval, M,
dc.creatorFerro, Edgardo Carlos
dc.creatorAlimenti, O.
dc.date.accessioned2020-05-24T21:00:24Z
dc.date.accessioned2022-10-15T05:30:29Z
dc.date.available2020-05-24T21:00:24Z
dc.date.available2022-10-15T05:30:29Z
dc.date.created2020-05-24T21:00:24Z
dc.date.issued2007-12
dc.identifierCayssials, Ricardo Luis; Duval, M,; Ferro, Edgardo Carlos; Alimenti, O.; uRT51: An Embedded Real-Time processor implemented on FPGA devices; Planta Piloto de Ingeniería Química; Latin American Applied Research; 37; 1; 12-2007; 35-40
dc.identifier0327-0793
dc.identifierhttp://hdl.handle.net/11336/105854
dc.identifier1851-8796
dc.identifierCONICET Digital
dc.identifierCONICET
dc.identifier.urihttps://repositorioslatinoamericanos.uchile.cl/handle/2250/4349951
dc.description.abstractIn this paper we describe and evaluate the main features of the uRT51 processor. The uRT51 processor was designed for embedded realtime control applications. It is a processor architecture that incorporates the specific functions of a real-time system in hardware. It was described using synthesizable VHDL and it was implemented on FPGA devices. We describe how the uRT51 processor supports time, events, task and priorities. The performance of the uRT51 processor is evaluated using a control application as a case study. The experiments show that the uRT51 processor scheduling features outperform the ones obtained using a traditional RTOS-based real-time system.
dc.languageeng
dc.publisherPlanta Piloto de Ingeniería Química
dc.rightshttps://creativecommons.org/licenses/by-nc-nd/2.5/ar/
dc.rightsinfo:eu-repo/semantics/openAccess
dc.subjectReal-Time Processor
dc.subjectEmbedded Systems
dc.titleuRT51: An Embedded Real-Time processor implemented on FPGA devices
dc.typeinfo:eu-repo/semantics/article
dc.typeinfo:ar-repo/semantics/artículo
dc.typeinfo:eu-repo/semantics/publishedVersion


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