bachelorThesis
Tolerância a Falhas na Rede em Chip SPINoSys
Fecha
2017Registro en:
RIBEIRO, Jandson de Oliveira Cavalcanti. Tolerância a Falhas na Rede em Chip SPINoSys. 2017. 54 f. Monografia (Especialização) - Curso de Ciência da Computação, Departamento de Informática e Matemática Aplicada, Universidade Federal do Rio Grande do Norte, Natal, 2017.
Autor
Ribeiro, Jandson de Oliveira Cavalcanti
Resumen
With the advances in the manufacture of integrated circuits, chips with multiple processing
cores appeared. With the increase in the number of cores within a single chip, the use
of buses as solution for communication was no longer valid. In order to enable the
communication between the cores, it began to use peer to peer communication channels,
this communication model is called Network on Chip. The use of network on chip enabled
to create different types of networks that differ in their communication protocols. However,
the use of these channels made it possible, in addition to the possibility of failures during
processing, that there were also failures at the time of data transmission in the network.
Thus, with the emergence of new networks, there is a need to develop methods that
keep the chip working, even in case of failure of some component. This work proposes a
fault tolerance method for SPINoSys, an Netowrk on Chip created from IPNoSys, which
introduced the idea of joining processing units with routing units, making a single unit
responsible for executing and transmitting instructions. This method, in short, seeks to
perform data transmission through retries, where each uses different routes, while also
maintaining control in the network and the ability to know when, even with all attempts,
a message can not be transmitted.