dc.contributorCatunda, Sebastian Yuri Cavalcanti
dc.contributor
dc.contributor
dc.contributorPetraglia, Antonio
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dc.contributorSouza, Cleonilson Protasio de
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dc.contributorBelfort, Diomadson Rodrigues
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dc.contributorSilveira, Luiz Felipe de Queiroz
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dc.creatorSoares, Antonio Wallace Antunes
dc.date.accessioned2019-03-13T23:01:28Z
dc.date.accessioned2022-10-06T13:00:44Z
dc.date.available2019-03-13T23:01:28Z
dc.date.available2022-10-06T13:00:44Z
dc.date.created2019-03-13T23:01:28Z
dc.date.issued2018-11-23
dc.identifierSOARES, Antonio Wallace Antunes. Análise e projeto de um Conversor A/D Sigma Delta Incremental Multicanal de 4º Ordem. 2018. 124f. Tese (Doutorado em Engenharia Elétrica e de Computação) - Centro de Tecnologia, Universidade Federal do Rio Grande do Norte, Natal, 2018.
dc.identifierhttps://repositorio.ufrn.br/jspui/handle/123456789/26770
dc.identifier.urihttp://repositorioslatinoamericanos.uchile.cl/handle/2250/3962541
dc.description.abstractSeveral applications in the instrumentation field require signal acquisition systems with medium conversion rate and medium to high resolution, among them are the Multielectrode Matrices (MEA). The MEA manufactured on CMOS standard technology integrated circuits have allowed the study of several types of cell cultures, allowing the stimulation and recording of electrical activities of the cells in vitro. As the CMOS technology advances, the biomedical signal processing is suitably done in digital domain. Therefore, basic blocks such as Analog to Digital Converters (ADC) are essential to realize the interface in the mixed signal systems. In this way, this work proposes the design of an ADC to be applied in the multichannel biomedical signal acquisition systems, following the top-down approach for the Integrated Circuit design (IC). The architecture of the ADC consists of an Incremental Sigma Delta Converter (IΣ∆), which combines the high-precision characteristic of the traditional Σ∆ modulators with the advantage of the sample-by-sample conversion of the Nyquist converters, making it suitable for multichannel time-multiplexed applications. The modulator and digital filter which compose the IΣ∆ ADC consist of the single-loop Cascaded-Integrator FeedForward (CIFF) and Cascade-of-Integrator (CoI) topologies respectively, both fourth-order. The modulator was implemented in Discrete Time (DT), using the Switched Capacitor technique (SC). The circuits were designed using TSMC 0.18 µm CMOS technology and the results were obtained from post-layout, PVT and Monte Carlo simulations.
dc.publisherBrasil
dc.publisherUFRN
dc.publisherPROGRAMA DE PÓS-GRADUAÇÃO EM ENGENHARIA ELÉTRICA E DE COMPUTAÇÃO
dc.rightsAcesso Aberto
dc.subjectConversores analógicos digitais
dc.subjectSigma delta incremental
dc.subjectSigma delta
dc.subjectQuarta ordem
dc.subjectAplicações biomédicas
dc.subjectMatrizes multieletrodos
dc.subjectModelagem
dc.subjectCapacitores chaveados
dc.titleAnálise e projeto de um Conversor A/D Sigma Delta Incremental Multicanal de 4º Ordem
dc.typedoctoralThesis


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