dc.contributorAlair Dias Junior
dc.contributorhttp://lattes.cnpq.br/0174551632500870
dc.contributorJanier Arias Garcia
dc.contributorDiógenes Cecílio da Silva Júnior
dc.contributorLuiz Carlos Bambirra Torres
dc.creatorIuri Silva Castro
dc.date.accessioned2021-04-28T22:54:54Z
dc.date.accessioned2022-10-04T00:15:54Z
dc.date.available2021-04-28T22:54:54Z
dc.date.available2022-10-04T00:15:54Z
dc.date.created2021-04-28T22:54:54Z
dc.date.issued2019-12-12
dc.identifierhttp://hdl.handle.net/1843/35857
dc.identifier.urihttp://repositorioslatinoamericanos.uchile.cl/handle/2250/3832751
dc.description.abstractThe shift in the current computing paradigm to a decentralized virtual structural model, known as cloud computing, and the use of Internet of Things (IoT), is enabling numerous innovations in industrial applications, resulting in cost reduction, better time-to-market (TTM) and increased flexibility of the systems. However, a known side effect of this new paradigm is increased latency, being ineffective for systems that require low latency between acquiring data and process execution. For these latency-sensitive systems, edge-computing is an ideal solution because part of the computing is performed on edge devices. The introduction of edge-computing requires an increase in computing power of embedded systems, forcing developers to search for new technologies and new architectures to fulfill these needs. The utilization of heterogeneous computing platforms associated with a hardware/software collaborative design is a promising solution to meet such requirements, as long as we observe, at the design level, a balanced hardware/software partitioning of the application. When approached in a non-structured manner, this partitioning results in the coupling between the application’s hardware and software layers and increases the application complexity, among other problems. This work presents an approach for the partitioning between hardware and software which leverages the dynamic and partial reconfiguration (DPR) features of the device. The proposed structured method was applied in a case study of a pattern classification algorithm showing that it is capable of supporting DPR and reducing the coupling between the application’s hardware and software layers in real-world applications.
dc.publisherUniversidade Federal de Minas Gerais
dc.publisherBrasil
dc.publisherENG - DEPARTAMENTO DE ENGENHARIA ELÉTRICA
dc.publisherPrograma de Pós-Graduação em Engenharia Elétrica
dc.publisherUFMG
dc.rightshttp://creativecommons.org/licenses/by-nc/3.0/pt/
dc.rightsAcesso Aberto
dc.subjectSistemas embarcados
dc.subjectComputação na borda
dc.subjectParticionamento hardware/software
dc.subjectCo-design hardware/software
dc.subjectReconfiguração parcial e dinâmica
dc.subjectPlataformas de computação heterogênea
dc.titleUma abordagem para particionamento hardware/software baseada em reconfiguração parcial e dinâmica
dc.typeDissertação


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