| dc.creator | Chierchie, Fernando | |
| dc.creator | Paolini, Eduardo Emilio | |
| dc.creator | Stefanazzi, Leandro | |
| dc.date | 2018 | |
| dc.date.accessioned | 2019-05-28T11:19:49Z | |
| dc.date.available | 2019-05-28T11:19:49Z | |
| dc.identifier | http://digital.cic.gba.gob.ar/handle/11746/8438 | |
| dc.identifier | Recurso online | |
| dc.identifier.uri | http://repositorioslatinoamericanos.uchile.cl/handle/2250/2861240 | |
| dc.description | A fully-digital algorithm to shape the spectrum of dead-time distortion in power inverters is presented. Dead-time is required to avoid short circuits of the power source by the legs of a power inverter due to the finite turn-on and turn-off times of the switches. Dead-time modifies the pulse widths of the PWM signal causing high harmonic distortion. The proposed approach is based on time-to-digital conversion of the pulse widths at the output of the power stage, and does not require to measure the sign of the current, which is the preferred approach for dead-time compensation algorithms. The effect of the parasitic capacitance of the switching device, that distorts the switching waveform is also analyzed and corrected. Furthermore, the quantization noise produced by digital PWM is also reduced by the proposed approach and has a minimal computational cost. Hardware-inthe- loop simulations are provided to show the effectiveness of the proposed approach and experimental results using an H-bridge voltage source inverter are included. A minimum THD+N of 0.027% was achieved for a 1 kHz input driving an inductive load. | |
| dc.format | application/pdf | |
| dc.format | 24 p. | |
| dc.language | Inglés | |
| dc.publisher | IEEE Xplore | |
| dc.rights | info:eu-repo/semantics/openAccess | |
| dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 Internacional | |
| dc.subject | Ingeniería Eléctrica, Ingeniería Electrónica e Ingeniería de la Información | |
| dc.title | Dead-Time Distortion Shaping | |
