dc.contributorUniversidade Estadual Paulista (Unesp)
dc.date.accessioned2018-12-11T17:25:58Z
dc.date.available2018-12-11T17:25:58Z
dc.date.created2018-12-11T17:25:58Z
dc.date.issued2015-01-01
dc.identifier2015 IEEE 6th Latin American Symposium on Circuits and Systems, LASCAS 2015 - Conference Proceedings.
dc.identifierhttp://hdl.handle.net/11449/177557
dc.identifier10.1109/LASCAS.2015.7250476
dc.identifier2-s2.0-84945156769
dc.identifier9186632586177726
dc.identifier9338079447464341
dc.identifier0000-0001-5246-4438
dc.description.abstractThe design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35μm technology through Pspice software using a single supply voltage of 1.8V.
dc.languageeng
dc.relation2015 IEEE 6th Latin American Symposium on Circuits and Systems, LASCAS 2015 - Conference Proceedings
dc.rightsAcesso restrito
dc.sourceScopus
dc.subjectInterval type-2 fuzzy logic controller
dc.subjectMultiplier/divider
dc.subjectType-2 fuzzy logic
dc.titleDesign of CMOS current-mode multiplier-divider circuit for type-2 FLC applications
dc.typeActas de congresos


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