dc.contributor | Universidade de São Paulo (USP) | |
dc.contributor | Universidade Estadual Paulista (Unesp) | |
dc.contributor | imec | |
dc.contributor | KULeuven | |
dc.date.accessioned | 2018-12-11T16:45:10Z | |
dc.date.available | 2018-12-11T16:45:10Z | |
dc.date.created | 2018-12-11T16:45:10Z | |
dc.date.issued | 2017-02-01 | |
dc.identifier | Solid-State Electronics, v. 128, p. 43-47. | |
dc.identifier | 0038-1101 | |
dc.identifier | http://hdl.handle.net/11449/169278 | |
dc.identifier | 10.1016/j.sse.2016.10.021 | |
dc.identifier | 2-s2.0-85007247104 | |
dc.identifier | 2-s2.0-85007247104.pdf | |
dc.identifier | 0496909595465696 | |
dc.identifier | 0000-0002-0886-7798 | |
dc.description.abstract | In this work the Line-TFET performance is compared with MOSFET and Point-TFET devices, with different architectures (FinFET and GAA:Gate-All-Around) at both room and high temperatures. This analysis is based on the experimental basic analog parameters such as transconductance (gm), output conductance (gD) and intrinsic voltage gain (AV). Although the Line-TFETs present worse AV than the point-TFETs, when they are compared with MOSFET technology, the line-TFET shows a much better intrinsic voltage gain than both MOSFET architectures (FinFET and GAA). Besides the AV, the highest on-state current was obtained for Line-TFETs when compared with other two TFET architectures, which leads to a good compromise for analog application. | |
dc.language | eng | |
dc.relation | Solid-State Electronics | |
dc.relation | 0,492 | |
dc.rights | Acesso aberto | |
dc.source | Scopus | |
dc.subject | Different device architectures | |
dc.subject | Intrinsic voltage gain | |
dc.subject | Line-TFET | |
dc.title | Study of line-TFET analog performance comparing with other TFET and MOSFET architectures | |
dc.type | Artículos de revistas | |