dc.contributorUniversidade de São Paulo (USP)
dc.contributorUniversidade Estadual Paulista (Unesp)
dc.contributorimec
dc.contributorGhent University
dc.contributorKU Leuven
dc.date.accessioned2018-12-11T16:42:27Z
dc.date.available2018-12-11T16:42:27Z
dc.date.created2018-12-11T16:42:27Z
dc.date.issued2016-09-01
dc.identifierSolid-State Electronics, v. 123, p. 124-129.
dc.identifier0038-1101
dc.identifierhttp://hdl.handle.net/11449/168671
dc.identifier10.1016/j.sse.2016.05.004
dc.identifier2-s2.0-84969508640
dc.identifier2-s2.0-84969508640.pdf
dc.identifier0496909595465696
dc.identifier0000-0002-0886-7798
dc.description.abstractThis paper presents an experimental analysis of the analog application figures of merit: the intrinsic voltage gain (AV) and unit gain frequency, focusing on the performance comparison between silicon triple gate pFinFET devices, which were processed on both Si and Silicon-On-Insulator (SOI) substrates. The high temperature (from 25 °C to 150 °C) influence and different channel lengths and fin widths were also taken into account. While the temperature impact on the intrinsic voltage gain (AV) is limited, the unit gain frequency was strongly affected due to the carrier mobility degradation at higher temperatures, for both p- and n-type FinFET structures. In addition, the pFinFETs showed slightly larger AV values compared to the n-type counterparts, whereby the bulk FinFETs presented a higher dispersion than the SOI FinFETs.
dc.languageeng
dc.relationSolid-State Electronics
dc.relation0,492
dc.rightsAcesso aberto
dc.sourceScopus
dc.subjectAnalog parameters
dc.subjectBulk pFinFET
dc.subjectHigh temperature
dc.subjectSOI pFinFET
dc.titleComparative analysis of the intrinsic voltage gain and unit gain frequency between SOI and bulk FinFETs up to high temperatures
dc.typeArtículos de revistas


Este ítem pertenece a la siguiente institución