dc.contributorUniversidade Estadual Paulista (Unesp)
dc.date.accessioned2018-11-27T19:23:16Z
dc.date.available2018-11-27T19:23:16Z
dc.date.created2018-11-27T19:23:16Z
dc.date.issued2015-01-01
dc.identifier2015 Ieee 6th Latin American Symposium On Circuits & Systems (lascas). New York: Ieee, 4 p., 2015.
dc.identifier2330-9954
dc.identifierhttp://hdl.handle.net/11449/165265
dc.identifierWOS:000380477800072
dc.identifier9338079447464341
dc.description.abstractThe design of a low voltage current-mode CMOS multiplier/divider circuit is presented in this paper. This circuit is used to implement the type-reducer block of Type-2 Fuzzy Logic Controller chip. The simulation results of multiplier/divider circuit have been done in CMOS 0.35 mu m technology through Pspice software using a single supply voltage of 1.8V.
dc.languageeng
dc.publisherIeee
dc.relation2015 Ieee 6th Latin American Symposium On Circuits & Systems (lascas)
dc.rightsAcesso aberto
dc.sourceWeb of Science
dc.subjectcomponent
dc.subjectMultiplier/divider
dc.subjectType-2 fuzzy logic
dc.subjectInterval type-2 fuzzy logic controller
dc.titleDesign of CMOS Current-mode Multiplier-Divider circuit for type-2 FLC Applications
dc.typeActas de congresos


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