Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes

Abstract

One of future device candidates for the Si platform integration, the Ge pFinFET, is evaluated for two different shallow-trench-isolation (STI) processes at low temperature operation. The effective mobility around 700 cm(2)/Vs at 77 K is reported for both STI processes, as a result of the compressive strain in the channel. Regarding the OFF-state region, it is found that the substrate current plays an important role at room temperature and for long channels. It decreases up to three orders of magnitude from room temperature down to 200 K, as long as the p-n junction reverse current from the drain to bulk dominates the substrate current.