dc.contributorUniversidade Estadual Paulista (Unesp)
dc.date.accessioned2014-05-20T15:27:16Z
dc.date.available2014-05-20T15:27:16Z
dc.date.created2014-05-20T15:27:16Z
dc.date.issued2004-01-01
dc.identifier8th World Multi-conference on Systemics, Cybernetics and Informatics, Vol Xiv, Proceedings. Orlando: Int Inst Informatics & Systemics, p. 225-229, 2004.
dc.identifierhttp://hdl.handle.net/11449/37291
dc.identifierWOS:000227691900042
dc.description.abstractIt can be observed that the number and the complexity of the application's domains, where the Paraconsistent Annotated Logic has been used, have grown a lot in the last decade. This increase in the complexity of the application's domain is an extra challenge for the designers of such systems, once there are not suitable computer hardware to run paraconsistent systems. This work proposes a new hardware architecture for the building Paraconsistent system.
dc.languageeng
dc.publisherInt Inst Informatics & Systemics
dc.relation8th World Multi-conference on Systemics, Cybernetics and Informatics, Vol Xiv, Proceedings
dc.rightsAcesso aberto
dc.sourceWeb of Science
dc.subjectparaconsistent system
dc.subjecthardware
dc.subjectparaconsistent logic
dc.titleA new proposal of Arithmetic Logic Unit (ALU) to work with paraconsistent annotated logic
dc.typeActas de congresos


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